Commit 9764aa39 authored by Michael Munch's avatar Michael Munch
Browse files

Only forward new GO if other core is not busy

parent 94c76e72
......@@ -99,52 +99,64 @@ end entity;
architecture rtl of vme_core_arb is
signal core_1 : boolean := true;
signal core_1_req : boolean := true;
signal addr_magic_slv : std_logic_vector(cli_int_addr'high downto cli_int_addr'high - 8 + 1);
begin
-- cli_busy <= '1' when vc1_busy = '1' or vc2_busy = '1' else '0';
-- We or together all flags
cli_busy <= vc1_busy or vc2_busy;
cli_int_data_strobe <= vc1_int_data_strobe or vc2_int_data_strobe;
cli_int_blt_decision <= vc1_int_blt_decision or vc2_int_blt_decision;
cli_int_blt_decided_consumed <= vc1_int_blt_decided_consumed or vc2_int_blt_decided_consumed;
cli_int_go_consumed_strobe <= vc1_int_go_consumed_strobe or vc2_int_go_consumed_strobe;
cli_int_data_read <= vc1_int_data_read when core_1 else vc2_int_data_read;
cli_int_err_code <= vc1_int_err_code when core_1 else vc2_int_err_code;
-- We send all signals except go to both cores
vc1_int_addr <= cli_int_addr;
vc1_int_data_write <= cli_int_data_write;
vc1_int_data_write <= cli_int_data_write;
vc1_int_am_i <= cli_int_am_i;
vc1_int_vme_write <= cli_int_vme_write;
vc1_int_vme_write <= cli_int_vme_write;
vc1_int_blt_decided <= cli_int_blt_decided;
vc1_int_blt_continue <= cli_int_blt_continue;
vc1_int_berr_ok <= cli_int_berr_ok;
vc1_int_retzero <= cli_int_retzero;
vc2_int_addr <= cli_int_addr;
vc2_int_data_write <= cli_int_data_write;
vc2_int_data_write <= cli_int_data_write;
vc2_int_am_i <= cli_int_am_i;
vc2_int_vme_write <= cli_int_vme_write;
vc2_int_vme_write <= cli_int_vme_write;
vc2_int_blt_decided <= cli_int_blt_decided;
vc2_int_blt_continue <= cli_int_blt_continue;
vc2_int_berr_ok <= cli_int_berr_ok;
vc2_int_retzero <= cli_int_retzero;
-- Select core based on AM code
G_AM_SELECT : if am_select generate
core_1 <= cli_int_am_i /= am_magic;
core_1_req <= cli_int_am_i /= am_magic;
end generate;
-- Select core based on ADDR lines
G_ADDR_SELECT : if addr_select generate
addr_magic_slv <= std_logic_vector(to_unsigned(addr_magic, addr_magic_slv'length));
core_1 <= addr_magic_slv /=
core_1_req <= addr_magic_slv /=
cli_int_addr(addr_magic_slv'high downto addr_magic_slv'low)
and cli_int_retzero = '0';
end generate;
-- Only issue a GO if the other core is _not_ busy
vc1_int_vme_go <= '1' when (cli_int_vme_go = '1'
and core_1_req and vc2_busy = '0')
else '0';
vc1_int_vme_go <= '1' when cli_int_vme_go = '1' and core_1 else '0';
vc2_int_vme_go <= '1' when cli_int_vme_go = '1' and not core_1 else '0';
vc2_int_vme_go <= '1' when (cli_int_vme_go = '1'
and not core_1_req and vc1_busy = '0')
else '0';
-- Forward data and err from the busy core
cli_int_data_read <= vc1_int_data_read when vc1_busy = '1' else vc2_int_data_read;
cli_int_err_code <= vc1_int_err_code when vc1_busy = '1' else vc2_int_err_code;
end architecture;
......
Supports Markdown
0% or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment