Commit 836488c9 authored by Michael Munch's avatar Michael Munch
Browse files

Early busy release breaks AXI bridge

parent 54d8c5da
......@@ -232,9 +232,12 @@ begin
-- The busy of a client is simply while it is live.
-- This actually means that we will report busy some cycles
-- early. (But the clients are not likely to use this signal...)
p1_busy <= '1' when live_1 else '0';
p2_busy <= '1' when live_2 else '0';
-- p1_busy <= '1' when live_1 else '0';
-- p2_busy <= '1' when live_2 else '0';
p1_busy <= '1' when active_1 else '0';
p2_busy <= '1' when active_2 else '0';
FormalG : if Formal generate
-- VHDL helper vars
......
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