core_arb forwards std_logic with or

src/vme_core_arb.vhd

@@ -90,11 +90,13 @@ architecture rtl of vme_core_arb is
   signal core_1                  : boolean := true;
 begin
 
-  cli_busy                     <= vc1_busy                    when core_1 else vc2_busy;
+  -- cli_busy <= '1' when vc1_busy = '1' or vc2_busy = '1' else '0';
+  cli_busy                     <= vc1_busy                    or vc2_busy                   ;
+  cli_int_data_strobe          <= vc1_int_go_consumed_strobe  or vc2_int_go_consumed_strobe ;
+  cli_int_blt_decision_strobe  <= vc1_int_blt_decision_strobe or vc2_int_blt_decision_strobe;
+  cli_int_go_consumed_strobe   <= vc1_int_go_consumed_strobe  or vc2_int_go_consumed_strobe ;
+  
   cli_int_data_o               <= vc1_int_data_o              when core_1 else vc2_int_data_o;
-  cli_int_data_strobe          <= vc1_int_data_strobe         when core_1 else vc2_int_data_strobe;
-  cli_int_go_consumed_strobe   <= vc1_int_go_consumed_strobe  when core_1 else vc2_int_go_consumed_strobe;
-  cli_int_blt_decision_strobe  <= vc1_int_blt_decision_strobe when core_1 else vc2_int_blt_decision_strobe;
   cli_int_err_code             <= vc1_int_err_code            when core_1 else vc2_int_err_code;
 
   vc1_int_addr           <= cli_int_addr;